CoWoS

CoWoS, short for Chip-on-Wafer-on-Substrate, is TSMC’s 2.5D advanced-packaging platform that places an accelerator die and its high-bandwidth memory stacks side by side on a silicon interposer. Most leading AI accelerators are packaged this way, so CoWoS capacity directly limits how many accelerators the industry can ship.

What is CoWoS?

CoWoS is a 2.5D packaging method: the logic die (a GPU or custom accelerator) and several stacks of high-bandwidth memory are mounted next to each other on a silicon interposer, a thin slab of silicon crisscrossed with fine wiring that links them at very high bandwidth and short distance. The package is then attached to a substrate. The result behaves like one very large chip with memory pressed right against the compute, which is exactly what an AI accelerator needs. CoWoS is the most widely used way to integrate HBM with a leading-edge GPU, and TSMC has expanded it generation after generation as memory stacks and die sizes have grown.

How is CoWoS used in thematic investing?

CoWoS is the single clearest example of advanced packaging acting as a supply constraint. Because nearly every leading AI accelerator, from NVIDIA’s Blackwell to Google’s TPU, depends on it, the amount of CoWoS capacity TSMC can build effectively sets a ceiling on accelerator shipments, and that capacity has repeatedly run behind demand during the AI build-out. TSMC’s Q1 2026 revenue rose 40.6% in US dollars to $35.9 billion, with leading-edge nodes and CoWoS packaging the drivers (TSMC 6-K, Apr 16, 2026). The push toward even denser packaging beyond CoWoS, into hybrid bonding, is showing up in equipment orders: Besi’s Q1 2026 orders more than doubled year over year to 269.7 million euros (Besi, Apr 23, 2026). CoWoS sits at the center of the AI advanced chip packaging concept. Besi CEO Richard Blickman captured the demand environment for advanced packaging broadly:

“Besi reported strong first quarter results and advanced packaging orders in an improving industry environment.”

— Richard W. Blickman, President and CEO, BE Semiconductor Industries (Besi, Apr 23, 2026)

For investors, CoWoS is shorthand for the packaging bottleneck: when you read that AI accelerator supply is constrained, the constraint is often CoWoS capacity, and the value accrues to TSMC and the equipment and substrate makers around it.

Related terms & concepts

Frequently asked questions

Why does CoWoS capacity matter for AI?

Because nearly every leading AI accelerator, from NVIDIA's Blackwell to Google's TPU, is packaged with CoWoS. The number of accelerators the industry can ship is therefore bounded by how much CoWoS capacity TSMC has, which has made CoWoS a repeated bottleneck during the AI build-out.

What is the difference between CoWoS and hybrid bonding?

CoWoS is a 2.5D method that places dies side by side on a silicon interposer. Hybrid bonding is a 3D method that joins dies directly copper-to-copper at far higher density. They are complementary steps on the same trend toward integrating more silicon per package.

Sources & references

  1. TSMC Reports First Quarter 2026 Results (Form 6-K, Exhibit 99.1) · Taiwan Semiconductor Manufacturing Company / SEC EDGAR, 2026-04-16
  2. BE Semiconductor Industries N.V. Announces Q1-26 Results · BE Semiconductor Industries N.V., 2026-04-23